Tuesday, October 23, 2012

CY8C20111-SX1I PSoC Core

CY8C20111-SX1I PSoC Core
The PSoC Core is a powerful engine that supports a rich
instruction set. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers, IMO, and ILO.
The CPU core, called the M8C, is a powerful processor with
speeds up to 12 MHz. The M8C is a two MIPS, 8-bit
Harvard-architecture microprocessor.
System Resources provide additional capability such as a
configurable I
2
C slave or SPI master-slave communication
interface and various system resets supported by the M8C.
The Analog System consists of the CapSense PSoC block and
an internal 1.8 V analog reference. Together they support

capacitive sensing of up to 28 inputs.

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